Dr. Sekhar Reddy Kola | Semiconductor Devices | Best Researcher Award

Dr. Sekhar Reddy Kola | Semiconductor Devices | Best Researcher Award

Dr. Sekhar Reddy Kola | National Yang Ming Chiao Tung University | Taiwan

Dr. Sekhar Reddy Kola is a distinguished Postdoctoral Fellow at the National Yang Ming Chiao Tung University, Taiwan, with a Ph.D. in Electrical and Computer Engineering, specializing in semiconductor devices. His doctoral research, under the supervision of Professor Yiming Li, focused on the process variation effects and intrinsic parameter fluctuations of vertically stacked gate-all-around silicon nanosheet complementary field-effect transistors. His expertise spans advanced semiconductor device physics and modeling, including gate-all-around nanosheet and nanowire metal-oxide-semiconductor field-effect transistors, negative capacitance field-effect transistors, and complementary field-effect transistor circuit and static random-access memory designs. Dr. Kola’s work integrates statistical modeling, data analysis, and machine learning for performance optimization and variability analysis in nanoscale devices. With proficiency in technology computer-aided design, finite element method modeling, and quantum transport models, he has conducted extensive simulations related to process engineering, doping profiles, and stress effects. His research contributions also extend to radio frequency, reliability, and S-parameter analyses, highlighting his deep understanding of both theoretical and experimental semiconductor design. His research output includes 33 documents with 311 citations by 192 documents and an h-index of 10, reflecting the global recognition of his impactful scientific contributions. A recipient of the Best Paper Award at IEDMS in 2018 and the Outstanding Foreign Student Scholarship from 2017 to 2022, Dr. Kola exemplifies excellence in nanoelectronics and semiconductor innovation.

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Featured Publications

Sreenivasulu, V. B., Neelam, A. K., Kola, S. R., Singh, J., & Li, Y. (2023). Exploring the performance of 3-D nanosheet FET in inversion and junctionless modes: Device and circuit-level analysis and comparison. IEEE Access, 11, 90421–90429.

Yang, Y. S., Li, Y., & Kola, S. R. R. (2023). A physical-based artificial neural networks compact modeling framework for emerging FETs. IEEE Transactions on Electron Devices, 71(1), 223–230.

Butola, R., Li, Y., & Kola, S. R. (2022). A machine learning approach to modeling intrinsic parameter fluctuation of gate-all-around Si nanosheet MOSFETs. IEEE Access, 10, 71356–71369.

Kola, S. R., & Thoti, N. (2020). Characteristics of gate-all-around silicon nanowire and nanosheet MOSFETs with various spacers. 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 26.

Kola, S. R., Li, Y., & Thoti, N. (2020). Effects of spacer and single-charge trap on voltage transfer characteristics of gate-all-around silicon nanowire CMOS devices and circuits. 2020 IEEE 20th International Conference on Nanotechnology (IEEE-NANO), 217–220.

Yu, X. R., Chuang, M. H., Chang, S. W., Chang, W. H., Hong, T. C., Chiang, C. H., … Kola, S. R. (2022). Integration design and process of 3-D heterogeneous 6T SRAM with double layer transferred Ge/2Si CFET and IGZO pass gates for 42% reduced cell size. 2022 International Electron Devices Meeting (IEDM), 20.5.1–20.5.4.